University of Khartoum

Contention Reduction in Shared-Memory Multiprocessor Systems

Contention Reduction in Shared-Memory Multiprocessor Systems

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Title: Contention Reduction in Shared-Memory Multiprocessor Systems
Author: Galal Abdalla, Hisham
Abstract: Shared-memory multiprocessors built from commodity microprocessors are being increasingly used to provide high performance for a variety of scientific and commercial applications. The performance of parallel processing systems is sensitive to various hardware and software overheads and contention for hardware and software resources. Hardware resources such as interconnection network and memory introduce communication contention and memory contention that could seriously impact overall system performance. This project aims to present the most common problems as well as the most common and effective solutions to the communication and memory contention. This project focuses on the contention at the hardware level for there is a general tendency to focus on the contention on the systemic level –hardware and software-. Also, this research focuses within the shared-memory multiprocessor systems and attempt to find methods of maximizing parallel processing efficiency for it is the singlemost significant factor that could enhance the performance of the system as a whole. The project attempted to do so through focusing on the cache coherence problem. This dimension is significant for contention and its analysis can lead to the minimization of hazards that can involve communication contention and subsequent memory contention that could undermine the quality of parallel processing and reduce the overall performance of the Shared-memory multiprocessor systems. Various approaches to the cache coherence problem are surveyed and then we focus on the approach that is most widely used: the MESI (modified/exclusive/shared/invalid) protocol. The performance of the considered approaches has been arrived at through computer simulation of the MESI protocol. The simulation shows, how the MESI protocol can be used as a multi-processor cache coherence protocol by visualizing the dynamic process of the MESI protocol. Depending on different read and write requests of the processors the simulation shows the signal and data transfers between the individual caches and main memory. Moreover it visualizes the state transitions of the addressed cache blocks. This predictive evaluation was executed employing high level object-oriented language C++ Builder, because of its reliability and flexibility. The techniques that can be used to design a memory system that reduces the impact of contention are examined. To exemplify the techniques, the implementations and the design decisions taken in each are reviewed. The discussion covers memory organization, interconnection networks, memory allocation, cache memory, synchronization, and contention. The multiprocessor implementations considered are C.mmp, CM*, RP3, Alliant FX, Cedar, Butterfly, SPUR, Dragon, Multimax, and Balance [13]. The results obtained from this project prove the importance of minimizing contention for resources in shared-memory multiprocessors and constructing parallel processing systems that takes these results into consideration.
Description: 98 Pages
URI: http://khartoumspace.uofk.edu/handle/123456789/9907
Date: 2015-04-29


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